The combination of the new hardware supplied by Intel and AMD ,and the new versions of GCC targeting these machines makes x86-64code substantially different from that generated for IA32 machines. The main features include:
1、Pointers and long integers are 64 bits long. Integer arithmetic operations support 8, 16, 32 and 64-bit data types.
2、The set of general-purpose registers is expanded from 8 to 16.
3、Much of the program state is held in registers rather than on the stack. Integer and pointer procedure arguments(up to 6)are passed via registers. Some procedures do not need to access the stack at all.
4、Conditional operations are implemented using conditional move instructions when possible, yielding better performance than traditional branching code.
5、Floating-point operations are implemented using the register-oriented instruction set introduced with SSE version 2, rather than the stack-based approach supported by IA32.
5、All registers are 64bits long. The 64 bit extensions of the IA32 registers are named %rax, %rcx, %rdx, %rbx, %rsi, %rdi, %rsp, %rbp. The new registers are named %r8-%r15.
6、The low-order 32 bits of each register can be accessed directly. This gives us the familiar registers from IA32:%eax, %ecx, %edx, %ebx, %esi, %edi, %esp, %ebp, as well as eight new 32-bit registers:%r8d-%r15d
7、The low-order 16 bits of each register can be accessed directly, as is the case for IA32. The word-size versions of the new registers are named %r8w-%r15w.
8、The low-order 8 bits of each register can be accessed directly. This is true in IA32 only for the first four registers(%al, %cl, %dl, %bl). The byte-size versions of the other IA32 registers are named%sil, %dil, %spl, %bpl. The byte-size versions of the new registers are named %r8b-%r15b.
9、For backward compatibility, the second byte of registers %rax, %rcx, %rdx, %rbx can be directly accessed by instructions having single-byte operands.
